Hardware manual

Rev. 3.0, 09/98, page 91 of 361
Figure 6.2 shows a schematic diagram of port 2.
P2n
Hardware standby
Mode 3
Mode 1 or 2
RP2
Reset
ResetMode 1
Reset
WP2
WP2D
WP2P
R
RS
R
Q
Q
Q
D
D
D
P2n DR
P2n DDR
P2n PCR
C
C
C
*
RP2P
WP2P:
WP2D:
WP2:
RP2P :
RP2:
n = 0 to 7
Note: * Set-priority
Write Port 2 PCR
Write Port 2 DDR
Write Port 2
Read Port 2 PCR
Read Port 2
Internal data bus
Internal address bus
Figure 6.2 Port 2 Schematic Diagram