Product data

HD404818 Series
84
Item Symbol Pin Min Typ Max Unit Test Condition Notes
RESET high
width
t
RSTH
RESET 2 t
cyc
5
Input
capacitance
C
in
D
10
15 pF f = 1 MHz, V
in
= 0 V 8
90 pF f = 1 MHz, V
in
= 0 V 9
All pins except D
10
15 pF f = 1 MHz, V
in
= 0 V
RESET fall
time
t
RSTf
20 ms 5
Analog
comparator
stabilization
time
t
CSTB
D
12
, D
13
2t
cyc
7
Notes: 1. The oscillator stabilization time is the period up until the time the oscillator stabilizes after V
CC
reaches 4.0 V at power-on, or after RESET goes high. At power-on or stop mode release,
RESET must be kept high for at least t
RC
. Since t
RC
depends on the ceramic oscillator’s circuit
constant and stray capacitance, consult with the manufacturer when designing the reset circuit.
2. The oscillator stabilization time is the period up until the time the oscillator stabilizes after V
CC
reaches 4.0 V at power-on. The time required to stabilize the oscillator (t
RC
) must be obtained.
Since t
RC
depends on the crystal circuit constant and stray capacitance, consult with the
manufacturer.
3. See figure 43.
4. See figure 44. The unit t
cyc
is applied when the MCU is in standby mode or active mode.
5. See figure 45.
6. See figure 44. The unit t
subcyc
is applied when the MCU is in watch mode or subactive mode.
t
subcyc
= 244.14 µs (when a 32.768-kHz crystal oscillator is used)
7. The analog comparator stabilization time is the period up until the analog comparator stabilizes
and correct data can be read after placing D
12
/D
13
into analog input mode.
8. Applies to HD404812, HD404814, HD404816, and HD404818.
9. Applies to HD4074818.