Product data
HD404818 Series
49
Timer B Operation: Timer mode register B (TMB: $009) selects the auto-reload function, input clock
source, and prescaler divide ratio for timer B. When an external event input is used as an input clock signal
to timer B, select R3
3
/INT
1
as INT
1
by port mode register A (PMRA: $004) to prevent an external interrupt
request from occurring (figure 26)
Timer B is initialized according to the data written into timer load register B by software. Timer B counts
up at every clock input signal. When the next clock signal is applied to timer B after it is set to $FF, it will
generate an overflow output. In this case, if the auto-reload function is selected, timer B is initialized
according to the value of timer load register B. If it is not selected, timer B goes to $00. The timer B
interrupt request flag (IFTB: $002, bit 0) will be set as this overflow is output.
System
clock
INT
1
Selector
Prescaler S (PSS)
Clock
Timer latch
register BL
(TLBL)
Timer counter B
(TCB)
Timer load
register BU
(TLRU)
Timer load
register BL
(TLRL)
Timer mode
register B
(TMB)
Timer B interrupt
request flag
(IFTB)
3
Internal data bus
2
4
8
32
128
512
2048
÷
÷
÷
÷
÷
÷
÷
Free-running
control
Overflow
f
cyc
/f
SUB
(t
cyc
/t
subcyc
)
Timer latch register BU (TLBU)
Figure 26 Timer B Block Diagram
Timer C Operation: Timer mode register C (TMC: $00D) selects the auto-reload function and the
prescaler divide ratio for timer C.
Timer C is initialized according to the data written into timer load register C by software. Timer C counts
up at every clock input signal. When the next clock signal is applied to timer C after it is set to $FF, it will
generate an overflow output. In this case, if the auto-reload function is selected, timer C is initialized