Product data

HD404818 Series

Table 7 Timer A Interrupt Request Flag

IFTA Interrupt Request

0No

1 Yes

Timer A Interrupt Mask (IMTA: $001, Bit 3): The timer A interrupt mask prevents an interrupt request

from being generated by the timer A interrupt request flag (table 8).

Table 8 Timer A Interrupt Mask

IMTA Interrupt Request

0 Enabled

1 Disabled (masked)

Timer B Interrupt Request Flag (IFTB: $002, Bit 0): The timer B interrupt request flag is set by the

overflow output of timer B (table 9).

Table 9 Timer B Interrupt Request Flag

IFTB Interrupt Request

0No

1 Yes

Timer B Interrupt Mask (IMTB: $002, Bit 1): The timer B interrupt mask prevents an interrupt request

from being generated by the timer B interrupt request flag (table 10).

Table 10 Timer B Interrupt Mask

IMTB Interrupt Request

0 Enabled

1 Disabled (masked)

Timer C Interrupt Request Flag (IFTC: $002, Bit 2): The timer C interrupt request flag is set by the

overflow output of timer C (table 11).

Table 11 Timer C Interrupt Request Flag

IFTC Interrupt Request

0No

1 Yes