Product data

HD404818 Series

IF0

IM0

IF1

IM1

IFTA

IMTA

IFTB

IMTB

IFTC

IMTC

IFS

IMS

$ 000,0

$ 000,2

$ 000,3

$ 001,0

$ 001,1

$ 001,2

$ 001,3

$ 002,0

$ 002,1

$ 002,2

$ 002,3

$ 003,0

$ 003,1

Sequence control

• Push PC/CA/ST

• Reset IE

• Jump to vector

address

Priority control logic

Vector

address

Note: $m, n is RAM address $m, bit number n.

Figure 6 Interrupt Control Circuit Block Diagram

Table 2 Vector Addresses and Interrupt Priority

Reset/Interrupt Priority Vector Addresses

RESET — $0000

INT

1 $0002

INT

2 $0004

Timer A 3 $0006

Timer B 4 $0008

Timer C 5 $000A

Serial 6 $000C