Datasheet
Section 2 CPU 
Rev. 3.00 Mar. 15, 2006 Page 14 of 526 
REJ09B0060-0300   
Bit Bit Name
Initial 
Value R/W Description 
7  I  1  R/W  Interrupt Mask Bit 
Masks interrupts other than NMI when set to 1. NMI is 
accepted regardless of the I bit setting. The I bit is set to 
1 at the start of an exception-handling sequence. 
6 UI Undefined R/W  User Bit 
Can be written and read by software using the LDC, 
STC, ANDC, ORC, and XORC instructions. 
5 H  Undefined R/W Half-Carry Flag 
When the ADD.B, ADDX.B, SUB.B, SUBX.B, CMP.B, 
or NEG.B instruction is executed, this flag is set to 1 if 
there is a carry or borrow at bit 3, and cleared to 0 
otherwise. When the ADD.W, SUB.W, CMP.W, or 
NEG.W instruction is executed, the H flag is set to 1 if 
there is a carry or borrow at bit 11, and cleared to 0 
otherwise. When the ADD.L, SUB.L, CMP.L, or NEG.L 
instruction is executed, the H flag is set to 1 if there is a 
carry or borrow at bit 27, and cleared to 0 otherwise. 
4 U  Undefined R/W User Bit 
Can be written and read by software using the LDC, 
STC, ANDC, ORC, and XORC instructions. 
3 N  Undefined R/W Negative Flag 
Stores the value of the most significant bit of data as a 
sign bit. 
2 Z  Undefined R/W Zero Flag 
Set to 1 to indicate zero data, and cleared to 0 to 
indicate non-zero data. 
1 V  Undefined R/W Overflow Flag 
Set to 1 when an arithmetic overflow occurs, and 
cleared to 0 at other times. 
0 C  Undefined R/W Carry Flag 
Set to 1 when a carry occurs, and cleared to 0 
otherwise. Used by: 
•  Add instructions, to indicate a carry 
•  Subtract instructions, to indicate a borrow 
•  Shift and rotate instructions, to indicate a carry 
The carry flag is also used as a bit accumulator by bit 
manipulation instructions. 










