Datasheet

Section 15 Watchdog Timer
Rev. 3.00 Mar. 15, 2006 Page 290 of 526
REJ09B0060-0300
15.2 Register Descriptions
The watchdog timer has the following registers.
• Timer control/status register WD (TCSRWD)
• Timer counter WD (TCWD)
• Timer mode register WD (TMWD)
15.2.1 Timer Control/Status Register WD (TCSRWD)
TCSRWD performs the TCSRWD and TCWD write control. TCSRWD also controls the
watchdog timer operation and indicates the operating state. TCSRWD must be rewritten by using
the MOV instruction. The bit manipulation instruction cannot be used to change the setting value.
Bit Bit Name
Initial
Value R/W Description
7 B6WI 1 R/W Bit 6 Write Inhibit
The TCWE bit can be written only when the write value
of the B6WI bit is 0.
This bit is always read as 1.
6 TCWE 0 R/W Timer Counter WD Write Enable
TCWD can be written when the TCWE bit is set to 1.
When writing data to this bit, the value for bit 7 must be
0.
5 B4WI 1 R/W Bit 4 Write Inhibit
The TCSRWE bit can be written only when the write
value of the B4WI bit is 0. This bit is always read as 1.
4 TCSRWE 0 R/W Timer Control/Status Register WD Write Enable
The WDON and WRST bits can be written when the
TCSRWE bit is set to 1.
When writing data to this bit, the value for bit 5 must be
0.
3 B2WI 1 R/W Bit 2 Write Inhibit
This bit can be written to the WDON bit only when the
write value of the B2WI bit is 0.
This bit is always read as 1.