Datasheet

Peripherals
10
H8
®
Family of Microcontrollers
■ Analog Interfaces
• 4- to 16-channel 10-bit successive-
approximation A/D converter (ADC)
• 2-channel, 14-bit delta-sigma ADC
• 2- to 4-channel 8-bit D/A converter
■ Timers
• Rich suite of 8-bit and 16-bit
multifunction, multipurpose timers
– Input capture, output compare, auto
reload, event counter, up/down counter,
interval timer, and sleep mode timer
• 3-phase Motor Control Timer
– 2-phase encoder with up/down count
capability
– Suitable for motor control apps
• Asynchronous Event Counter (AEC)
– Counts events even when system clock
is disabled for power saving
• Watchdog timer (WDT) with inde-
pendent RC circuit for greater safety
• 10-bit or 14-bit Pulse Width
Modulation (PWM) timer with
ripple-reduction feature
– Can be used as a D/A converter by
adding an external low-pass filter
• Real-Time Clock (RTC): seconds,
minutes, hours, days and weeks
■ Arbitrary Waveform Generation /
Programmable Pulse Generator
(PPG) / Timing Pattern Controller
(TPC)
• Arbitrary waveform patterns are
stored in memory and generated on
output pins with the PPG or TPC in
conjunction with a timer and DMA
• Provides 8/16-bit programmable pulse
outputs using TPU as base
• Output trigger signals can be selected
in 4-bit groups
• Each group can operate both
simultaneously and independently
• Output trigger signals can operate in
parallel with DTC and DMAC
PGA
ADCR
Internal data bus
PSS
Multiplexer
IRRSDADCN
fovs =
Φ
fovs = Φ/2, Φ/4, Φ/8, Φ/16, Φ/32
Secondary
A/D converter
LCD drive power supply circuit
Reference voltage
generator
Legend
A
DCR:
A
DSSR: IRRSDADCN:
A
DDR:
BGRMR:
A/D conversion end interrupt request flag
A/D data register
Band-Gap Regulator (BGR) control register
Band-Gap
reference circuit
Clock interrupt
control circuit
Dout (16 bits;
14 bits are valid)
Programmable gain amplifier
System clock
Φ
ADSSR
LCD
ADDR (16 bits)
Ain1
Ain2
V
ref/REF
ACOM
Buffer
BGRMR
A/D control register
A/D start/status register
H8/38086 14-bit Delta-Sigma A/D
Select clock
Bus interface
Clock
Internal data bus
DADRA
DADRB
PWX1
Internal clock
φ
φ
/2
PWX0
Fine–adjustment pulse addition
Fine–adjustment pulse addition
Legend:
DACR:
PWM D/A control register
DADRA:
PWM D/A data register A
DADRB:
PWM D/A data register B
DACNT:
PWM D/A counter
DACR
Control
logic
Base cycle compare match A
Base cycle compare match B
Base cycle overflow
Module data bus
Comparator
A
Comparator
B
DACNT
Internal clock
32KOVI (IRQ15)
(Interrupt
request signal)
SUBCK/64
SUBCK/256
SUBCK/32
SUBCK/128
Clock
Counter
TCNT32K TCR32K
Module bus
Clock
Select
Bus
Interface
Internal bus
TK32K
H8/Tiny 14-Bit PWM Timer Block Diagram
H8S 32K Sleep Mode Timer Block Diagram