Datasheet

Section 12 Programmable Pulse Generator (PPG)
(This function is not available in the H8S/2695)
Page 660 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Figure 12.10 illustrates the non-overlapping pulse output operation.
Compare match A
Compare match B
Pulse
output
pin
Normal output/inverted output
C
PODRQD
NDER
Q
NDRQD
Internal data bus
DDR
Figure 12.10 Non-Overlapping Pulse Output
Therefore, 0 data can be transferred ahead of 1 data by making compare match B occur before
compare match A. The NDR contents should not be altered during the interval from compare
match B to compare match A (the non-overlap margin).
This can be accomplished by having the TGIA interrupt handling routine write the next data in
NDR, or by having the TGIA interrupt activate the DTC or DMAC. Note, however, that the next
data must be written before the next compare match B occurs.
Figure 12.11 shows the timing of this operation.
0/1 output0 output 0/1 output0 output
Do not write
to NDR here
Write to NDR
here
Compare match A
Compare match B
NDR
PODR
Do not write
to NDR here
Write to NDR
here
Write to NDR
Write to NDR
Figure 12.11 Non-Overlapping Operation and NDR Write Timing