Datasheet

Section 24 Power-Down Modes
Page 1028 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Bit 6—Low-Speed ON Flag (LSON): When shifting to low power dissipation mode by executing
the SLEEP instruction, this bit specifies the operating mode, in combination with other control
bits. This bit also controls whether to shift to high-speed mode or subactive mode
*
when watch
mode
*
is cancelled.
Note: * This function is not available in the H8S/2695.
Bit 6
LSON Description
0
• When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode, software standby mode, or watch mode
*
1
*
2
.
• When the SLEEP instruction is executed in subactive mode
*
2
, operation shifts to
watch mode
*
2
or shifts directly
*
2
to high-speed mode.
• Operation shifts to high-speed mode when watch mode is cancelled. (Initial value)
1
• When the SLEEP instruction is executed in high-speed mode, operation shifts to
watch mode
*
2
or subactive mode
*
2
.
• When the SLEEP instruction is executed in subactive mode
*
2
, operation shifts to
subsleep mode
*
2
or watch mode
*
2
.
• Operation shifts to subactive
*
2
mode when watch mode
*
2
is cancelled.
Notes: 1. Always set high-speed mode when shifting to watch mode or subactive mode.
2. This function is not available in the H8S/2695.
Bit 5—Noise Elimination Sampling Frequency Select (NESEL): This bit selects the sampling
frequency of the subclock (φSUB) generated by the subclock oscillator is sampled by the clock (φ)
generated by the system clock oscillator. Set this bit to 0 when φ=5MHz or more.
Bit 5
NESEL Description
0 Sampling using 1/32 xφ (Initial value)
1 Sampling using 1/4 xφ
Bit 4—Subclock enable (SUBSTP): This bit enables/disables subclock generation.
Bit 4
SUBSTP Description
0 Enables subclock generation (Initial value)
1 Disables subclock generation