Datasheet

Rev.6.00 Oct.28.2004 page 943 of 1016
REJ09B0138-0600H
TCNT—Timer Counter H'FFBC (W), H'FFBD (R) WDT
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
0
0
R/W
2
0
R/W
1
0
R/W
Bit
Initial value
Read/Write
TCNT is an 8-bit readable/writable* up-counter.
Note: * TCNT is write-protected by a password to prevent accidental overwriting.
For details see section 13.2.4, Notes on Register Access.
:
:
:
RSTCSR—Reset Control/Status Register H'FFBE (W) , H'FFBF (R) WDT
7
WOVF
0
R/(W)*
6
RSTE
0
R/W
5
RSTS
0
R/W
4
—
1
—
3
—
1
—
0
—
1
—
2
—
1
—
1
—
1
—
0
1
[Clearing condition]
Cleared by reading RSTCSR when WOVF = 1, then writing 0 to WOVF
Watchdog Timer Overflow Flag
Note: * Can only be written with 0 for flag clearing.
The method for writing to RSTCSR is different from that for general registers to prevent
accidental overwriting. For details see section 13.2.4, Notes on Register Access.
0
1
Reset Enable
Reset signal is not generated if TCNT overflows*
Reset signal is generated if TCNT overflows
Note: * Manual reset is not supported in the H8S/2357
(F-ZTAT and masked ROM versions) or the H8S/2352,
H8S/2398, H8S/2394, H8S/2392 and H8S/2390.
In these models, only 0 should be written to this bit.
0
1
Reset Select
Power-on reset
Manual reset*
Bit
Initial value
Read/Write
:
:
:
[Setting condition]
Set when TCNT overflows (changed from H'FF to H'00) during
watchdog timer operation
Note: * The modules H8S/2357 Group are not reset, but TCNT and
TCSR in WDT are reset.