Datasheet

Rev.6.00 Oct.28.2004 page 884 of 1016
REJ09B0138-0600H
7
0
R/W
6
DAID
0
R/W
5
DAIDE
0
R/W
4
0
R/W
3
DTF3
0
R/W
0
DTF0
0
R/W
2
DTF2
0
R/W
1
DTF1
0
R/W
0
1
Destination Address Increment/Decrement
0
1
0
1
MARB is fixed
MARB is incremented after a data transfer
MARB is fixed
MARB is decremented after a data transfer
——
Auto-request (burst)
Activated by A/D converter conversion
end interrupt
Activated by DREQ pin falling edge input
Activated by DREQ pin low-level input
Activated by SCI channel 0 transmission
data empty interrupt
Activated by SCI channel 0 reception
data full interrupt
Activated by SCI channel 1 transmission
data empty interrupt
Activated by SCI channel 1 reception
data full interrupt
Activated by TPU channel 0 compare
match/input capture A interrupt
Activated by TPU channel 1 compare
match/input capture A interrupt
Activated by TPU channel 2 compare
match/input capture A interrupt
Activated by TPU channel 3 compare
match/input capture A interrupt
Activated by TPU channel 4 compare
match/input capture A interrupt
Activated by TPU channel 5 compare
match/input capture A interrupt
0
1
Data Transfer Factor
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Block Transfer Mode
DTF
3
DTF
2
DTF
1
DTF
0
Normal Mode
Activated by DREQ
pin falling edge input
Activated by DREQ
pin low-level input
Full address mode (cont)
Bit
DMACRB
Initial value
Read/Write
:
:
:
:
Auto-request (cycle
steal)
Reserved
Only 0 should be
written to this bit.
Reserved
Only 0 should be
written to this bit.