Datasheet
Rev.6.00 Oct.28.2004 page 882 of 1016
REJ09B0138-0600H
DMAWER—DMA Write Enable Register H'FF00 DMAC
7
—
0
—
6
—
0
—
5
—
0
—
4
—
0
—
3
WE1B
0
R/W
0
WE0A
0
R/W
2
WE1A
0
R/W
1
WE0B
0
R/W
Bit
DMAWER
Initial value
Read/Write
:
:
:
:
0
1
Write Enable 1B
0
1
Write Enable 1A
0
1
Writes to all bits in DMACR0A,
and bits 8, 4, and 0 in DMABCR
are disabled
Write Enable 0A
0
1
Write Enable 0B
Writes to all bits in DMACR0A,
and bits 8, 4, and 0 in DMABCR
are enabled
Writes to all bits in DMACR0B, bits 9,
5, and 1 in DMABCR, and bit 4 in
DMATCR are disabled
Writes to all bits in DMACR0B, bits 9,
5, and 1 in DMABCR, and bit 4 in
DMATCR are enabled
Writes to all bits in DMACR1A, and bits
10, 6, and 2 in DMABCR are disabled
Writes to all bits in DMACR1A, and bits
10, 6, and 2 in DMABCR are enabled
Writes to all bits in DMACR1B, bits 11, 7, and 3 in
DMABCR, and bit 5 in DMATCR are disabled
Writes to all bits in DMACR1B, bits 11, 7, and 3 in
DMABCR, and bit 5 in DMATCR are enabled