Datasheet

Rev.6.00 Oct.28.2004 page 878 of 1016
REJ09B0138-0600H
ETCR0A—Transfer Count Register 0A H'FEE6 DMAC
0
*
R/W
2
*
R/W
1
*
R/W
3
*
R/W
4
*
R/W
5
*
R/W
6
*
R/W
7
*
R/W
8
*
R/W
9
*
R/W
10
*
R/W
11
*
R/W
12
*
R/W
13
*
R/W
14
*
R/W
15
*
R/W
* : Undefined
Transfer counter
Sequential
mode
Idle mode
Normal mode
Transfer number storage register Transfer counter
Block size storage register Block size counter
Bit
ETCR0A
Initial value
Read/Write
:
:
:
:
Block transfer
mode
Repeat mode
MAR0BH—Memory Address Register 0BH H'FEE8 DMAC
MAR0BL—Memory Address Register 0BL H'FEEA DMAC
16
*
R/W
18
*
R/W
17
*
R/W
19
*
R/W
21
*
R/W
22
*
R/W
23
*
R/W
24
—
0
—
25
—
0
—
26
—
0
—
27
—
0
—
28
—
0
—
29
—
0
—
30
—
0
—
31
—
0
—
0
*
R/W
2
*
R/W
1
*
R/W
3
*
R/W
4
*
R/W
5
*
R/W
6
*
R/W
7
*
R/W
8
*
R/W
9
*
R/W
10
*
R/W
11
*
R/W
12
*
R/W
13
*
R/W
14
*
R/W
15
*
R/W
20
*
R/W
* : Undefined
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Specifies transfer destination address
Bit
MAR0BH
Initial value
Read/Write
:
:
:
:
:
:
:
:
Bit
MAR0BL
Initial value
Read/Write
IOAR0B—I/O Address Register 0B H'FEEC DMAC
0
*
R/W
2
*
R/W
1
*
R/W
3
*
R/W
4
*
R/W
5
*
R/W
6
*
R/W
7
*
R/W
8
*
R/W
9
*
R/W
10
*
R/W
11
*
R/W
12
*
R/W
13
*
R/W
14
*
R/W
15
*
R/W
* : Undefined
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Not used
Bit
IOAR0B
Initial value
Read/Write
:
:
:
: