Datasheet

Rev.6.00 Oct.28.2004 page 877 of 1016
REJ09B0138-0600H
RAMER—RAM Emulation Register H'FEDB Bus Controller
(for H8S/2357F-ZTAT only)
7
0
6
0
5
0
4
0
3
0
0
RAM0
0
R/W
2
RAMS
0
R/W
1
RAM1
0
R/W
Bit
Initial value
Read/Write
:
:
:
RAMS
0
1
RAM Select, Flash Memory Area
RAM1
×
0
1
RAM0
×
0
1
0
1
Area
×: Don’t care
H'FFDC00 to H'FFDFFF
H'000000 to H'0003FF
H'000400 to H'0007FF
H'000800 to H'000BFF
H'000C00 to H'000FFF
MAR0AH—Memory Address Register 0AH H'FEE0 DMAC
MAR0AL—Memory Address Register 0AL H'FEE2 DMAC
16
*
R/W
18
*
R/W
17
*
R/W
Bit
MAR0AH
Initial value
Read/Write
:
:
:
:
19
*
R/W
21
*
R/W
22
*
R/W
23
*
R/W
24
0
25
0
26
0
27
0
28
0
29
0
30
0
31
0
0
*
R/W
2
*
R/W
1
*
R/W
3
*
R/W
4
*
R/W
5
*
R/W
6
*
R/W
7
*
R/W
8
*
R/W
9
*
R/W
10
*
R/W
11
*
R/W
12
*
R/W
13
*
R/W
14
*
R/W
15
*
R/W
20
*
R/W
* : Undefined
Bit
MAR0AL
Initial value
Read/Write
:
:
:
:
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Specifies transfer source address
IOAR0A—I/O Address Register 0A H'FEE4 DMAC
0
*
R/W
2
*
R/W
1
*
R/W
3
*
R/W
4
*
R/W
5
*
R/W
6
*
R/W
7
*
R/W
8
*
R/W
9
*
R/W
10
*
R/W
11
*
R/W
12
*
R/W
13
*
R/W
14
*
R/W
15
*
R/W
* : Undefined
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Not used
Bit
IOAR0A
Initial value
Read/Write
:
:
:
: