Datasheet

Rev.6.00 Oct.28.2004 page 869 of 1016
REJ09B0138-0600H
ABWCR—Bus Width Control Register H'FED0 Bus Controller
7
ABW7
1
R/W
0
R/W
6
ABW6
1
R/W
0
R/W
5
ABW5
1
R/W
0
R/W
4
ABW4
1
R/W
0
R/W
3
ABW3
1
R/W
0
R/W
0
ABW0
1
R/W
0
R/W
2
ABW2
1
R/W
0
R/W
1
ABW1
1
R/W
0
R/W
Bit
Modes 5 to 7
Initial value
R/W
Mode 4
Initial value
Read/Write
:
:
:
:
:
Area 7 to 0 Bus Width Control
0
1
Area n is designated for 16-bit access
Area n is designated for 8-bit access
(
n = 7 to 0
)
Note: * Modes 6 and 7 are provided in the On-chip ROM version only.
ASTCR—Access State Control Register H'FED1 Bus Controller
7
AST7
1
R/W
6
AST6
1
R/W
5
AST5
1
R/W
4
AST4
1
R/W
3
AST3
1
R/W
0
AST0
1
R/W
2
AST2
1
R/W
1
AST1
1
R/W
Bit
Initial value
Read/Write
:
:
:
Area 7 to 0 Access State Control
0
1
Area n is designated for 2-state access
Wait state insertion in area n external space is disabled
Area n is designated for 3-state access
Wait state insertion in area n external space is enabled
(n = 7 to 0)