Datasheet

Rev.6.00 Oct.28.2004 page 59 of 1016
REJ09B0138-0600H
Bit 3—Flash Memory Control Register Enable (FLSHE): Controls CPU access to the flash memory control registers
(FLMCR1, FLMCR2, EBR1, and EBR2). For details, see section 19, ROM.
Bit 3
FLSHE Description
0 Flash control registers are not selected for addresses H'FFFFC8 to H'FFFFCB
(Initial value)
1 Flash control registers are selected for addresses H'FFFFC8 to H'FFFFCB
Bits 2 to 0—Reserved: These bits cannot be modified and are always read as 0.