Datasheet

Rev.6.00 Oct.28.2004 page 775 of 1016
REJ09B0138-0600H
Addressing Mode/
Instruction Length (Bytes)
Operand Size
#xx
Rn
@ERn
@(d,ERn)
@–ERn/@ERn+
@aa
@(d,PC)
@@aa
—
Mnemonic
DIVXU DIVXS CMP NEG EXTU
DIVXU.B Rs,Rd B 2 DIVXU.W Rs,ERd W 2 divxs.B Rs,Rd B 4 DIVXS.W Rs,ERd W 4 CMP.B #xx:8,Rd B 2 CMP.B Rs,Rd B 2 CMP.W #xx:16,Rd W 4 CMP.W Rs,Rd W 2 CMP.L #xx:32,ERd L 6 CMP.L ERs,ERd L 2 NEG.B Rd B 2 NEG.W Rd W 2 NEG.L ERd L 2 EXTU.W Rd W 2 EXTU.L ERd L 2
Rd16÷Rs8→
Rd16 (RdH: remainder,
— — [6] [7] — — 12
RdL: quotient) (unsigned division) ERd32÷Rs16
→
ERd32 (Ed: remainder,
— — [6] [7] — — 20
Rd: quotient) (unsigned division) Rd16÷Rs8→
Rd16 (RdH: remainder,
— — [8] [7] — — 13
RdL: quotient) (signed division) ERd32
÷Rs16→
ERd32 (Ed: remainder,
— — [8] [7] — — 21
Rd: quotient) (signed division) Rd8-#xx:8 — 1 Rd8-Rs8 — 1 Rd16-#xx:16 — [3] 2 Rd16-Rs16 — [3] 1 ERd32-#xx:32 — [4] 3 ERd32-ERs32 — [4] 1 0-Rd8→Rd8 — 1 0-Rd16→Rd16 — 1 0-ERd32→ERd32 — 1 0→(<bit 15 to 8> of Rd16) — — 0 0 — 1 0→(<bit 31 to 16> of ERd32) — — 0 0 — 1
Operation
Condition Code
IHNZVC
Advanced
No. of States*
1
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