Datasheet

Rev.6.00 Oct.28.2004 page 710 of 1016
REJ09B0138-0600H
(3) Bus Timing
Table 22-16 lists the bus timing.
Table 22-16 Bus Timing
Conditions: V
CC
= 5.0 V ± 10%, AV
CC
= 5.0 V ± 10%, V
ref
= 4.5 V to AV
CC
,
V
SS
= AV
SS
= 0 V, ø= 10 to 20 MHz, T
a
= –20 to +75°C (regular specifications),
T
a
= –40 to +85°C (wide-range specifications)
Condition Test
Item Symbol Min Max Unit Conditions
Address delay time t
AD
— 20 ns Figure 22-40 to
Address setup time t
AS
0.5 ×
t
cyc
– 15
—ns
Figure 22-47
Address hold time t
AH
0.5 ×
t
cyc
– 10
—ns
Precharge time t
PCH
1.5 ×
t
cyc
– 20
—ns
CS delay time 1 t
CSD1
—20ns
CS delay time 2 t
CSD2
—20ns
CS delay time 3 t
CSD3
—25ns
AS delay time t
ASD
—20ns
RD delay time 1 t
RSD1
—20ns
RD delay time 2 t
RSD2
—20ns
CAS delay time t
CASD
—20ns
Read data setup time t
RDS
15 — ns
Read data hold time t
RDH
0—ns
Read data access time 1 t
ACC1
— 1.0 ×
t
cyc
– 25
ns
Read data access time 2 t
ACC2
— 1.5 ×
t
cyc
– 25
ns
Read data access time 3 t
ACC3
— 2.0 ×
t
cyc
– 25
ns
Read data access
time 4
t
ACC4
— 2.5 ×
t
cyc
– 25
ns
Read data access
time 5
t
ACC5
— 3.0 ×
t
cyc
– 25
ns
WR delay time 1 t
WRD1
—20ns
WR delay time 2 t
WRD2
—20ns
WR pulse width 1 t
WSW1
1.0 ×
t
cyc
– 20
—ns
WR pulse width 2 t
WSW2
1.5 ×
t
cyc
– 20
—ns
Write data delay time t
WDD
—30ns
Write data setup time t
WDS
0.5 ×
t
cyc
– 20
—ns
Write data hold time t
WDH
0.5 ×
t
cyc
– 10
—ns
WR setup time t
WCS
0.5 ×
t
cyc
– 10
—ns