Rev.6.00 Oct.28.2004 page 693 of 1016
REJ09B0138-0600H
ø
T
Rc
CAS
T
Rc
t
CASD
CS5 to CS2
(RAS)
T
Rr
t
CASD
t
CSD2
T
Rp
t
CSD2
Figure 22-13 Self-Refresh Timing
t
RSD2
ø
T
1
AS
A
23
to A
0
T
2
t
AH
t
ACC3
t
RDS
CS0
D
15
to D
0
(read)
T
2
or
T
3
t
AS
T
1
t
ASD
t
ASD
t
RDH
t
AD
RD
(read)
Figure 22-14 Burst ROM Access Timing (Two-State Access)
