Datasheet

Rev.6.00 Oct.28.2004 page 626 of 1016
REJ09B0138-0600H
19.15.8 Pin Configuration
The flash memory is controlled by means of the pins shown in table 19-31.
Table 19-31 Flash Memory Pins
Pin Name Abbreviation I/O Function
Reset RES Input Reset
Mode 2 MD2 Input Sets MCU operating mode
Mode 1 MD1 Input Sets MCU operating mode
Mode 0 MD0 Input Sets MCU operating mode
Port 66 P66 Input Sets MCU operating mode in programmer mode
Port 65 P65 Input Sets MCU operating mode in programmer mode
Port 64 P64 Input Sets MCU operating mode in programmer mode
Transmit data TxD1 Output Serial transmit data output
Receive data RxD1 Input Serial receive data input
19.15.9 Register Configuration
The registers used to control the on-chip flash memory when enabled are shown in table 19-32.
In order to access the FLMCR1, FLMCR2, EBR1, and EBR2 registers, the FLSHE bit must be set to 1 in SYSCR2
(except RAMER).
Table 19-32 Flash Memory Registers
Register Name Abbreviation R/W Initial Value Address*
1
Flash memory control register 1 FLMCR1*
5
R/W*
3
H'80 H'FFC8*
2
Flash memory control register 2 FLMCR2*
5
R/W*
3
H'00*
4
H'FFC9*
2
Erase block register 1 EBR1*
5
R/W*
3
H'00*
4
H'FFCA*
2
Erase block register 2 EBR2*
5
R/W*
3
H'00*
4
H'FFCB*
2
System control register 2 SYSCR2*
6
R/W H'00 H'FF42
RAM emulation register RAMER R/W H'00 H'FEDB
Notes: 1. Lower 16 bits of the address.
2. Flash memory. Registers selection is performed by the FLSHE bit in system control register 2 (SYSCR2).
3. In modes in which the on-chip flash memory is disabled, a read will return H'00, and writes are invalid.
4. If a high level is input and the SWE bit in FLMCR1 is not set, these registers are initialized to H'00.
5. FLMCR1, FLMCR2, EBR1, and EBR2 are 8-bit registers. Only byte accesses are valid for these registers, the
access requiring 2 states.
6. The SYSCR2 register can only be used in the F-ZTAT version. In the masked ROM version this register will
return an undefined value if read, and cannot be modified.