Datasheet

Rev.6.00 Oct.28.2004 page 570 of 1016
REJ09B0138-0600H
19.5.2 Programming and Verification
An efficient, high-speed programming procedure can be used to program and verify PROM data. This procedure writes
data quickly without subjecting the chip to voltage stress or sacrificing data reliability. It leaves the data H'FF in unused
addresses. Figure 19-4 shows the basic high-speed programming flowchart. Tables 19-7 and 19-8 list the electrical
characteristics of the chip during programming. Figure 19-5 shows a timing chart.
Start
Set programming/verification mode
Address = 0
Verification OK?
Yes
No
n = 0
n + 1→ n
Program with t
PW
= 0.2 ms ± 5%
Program with t
OPW
= 0.2n ms
Last address?
Set read mode
V
CC
= 5.0 V ± 0.25 V
V
PP
= V
CC
All addresses read?
V
CC
= 6.0 V ± 0.25 V,
V
PP
= 12.5 V ± 0.3 V
Yes
No
No
Yes
Go
Address + 1 → address
n < 25
End
Fail
No go
Figure 19-4 High-Speed Programming Flowchart