Datasheet

Rev.6.00 Oct.28.2004 page 335 of 1016
REJ09B0138-0600H
9.14.3 Pin Functions
Port G pins also function as bus control signal output pins (CS0 to CS3, and CAS). The pin functions are different in mode
7, and modes 4 to 6. Port G pin functions are shown in table 9-26.
Table 9-26 Port G Pin Functions
Pin Selection Method and Pin Functions
PG
4
/CS0 The pin function is switched as shown below according to the operating mode
and bit PG4DDR.
Operating
Mode Mode 7* Modes 4 to 6*
PG4DDR 0 1 0 1
Pin function PG
4
input pin PG
4
output pin PG
4
input pin CS0 output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
PG
3
/CS1 The pin function is switched as shown below according to the operating mode
and bit PG3DDR.
Operating
Mode Mode 7* Modes 4 to 6*
PG3DDR 0 1 0 1
Pin function PG
3
input pin PG
3
output pin PG
3
input pin CS1 output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
PG
2
/CS2 The pin function is switched as shown below according to the operating mode
and bit PG2DDR.
Operating
Mode Mode 7* Modes 4 to 6*
PG2DDR 0 1 0 1
Pin function PG
2
input pin PG
2
output pin PG
2
input pin CS2 output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
PG
1
/CS3 The pin function is switched as shown below according to the operating mode
and bit PG1DDR.
Operating
Mode Mode 7* Modes 4 to 6*
PG1DDR 0 1 0 1
Pin function PG
1
input pin PG
1
output pin PG
1
input pin CS3 output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
PG
0
/CAS The pin function is switched as shown below according to the combination of
the operating mode and bits RMTS2 to RMTS0 and PG0DDR.
Operating
Mode Mode 7* Modes 4 to 6*
RMTS2 to
RMTS0
— B'000,
B'100 to B'111
B'001 to
B'011
PG0DDR 0101—
Pin function PG
0
input
pin
PG
0
output
pin
PG
0
input
pin
PG
0
output
pin
CAS
output
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.