Datasheet

Rev.6.00 Oct.28.2004 page 332 of 1016
REJ09B0138-0600H
9.14 Port G
9.14.1 Overview
Port G is a 5-bit I/O port. Port G pins also function as bus control signal output pins (CS0 to CS3, and CAS).
Figure 9-26 shows the port G pin configuration.
PG
4
/CS0
PG
3
/CS1
PG
2
/CS2
PG
1
/CS3
PG
0
/CAS
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
PG
4
PG
3
PG
2
PG
1
PG
0
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
Port G pins Pin functions in mode 7* Pin functions in modes 4 to 6*
PG
4
(input)/CS0 (output)
PG
3
(input)/CS1 (output)
PG
2
(input)/CS2 (output)
PG
1
(input)/CS3 (output)
PG
0
(I/O)/CAS (output)
Port G
Figure 9-26 Port G Pin Functions
9.14.2 Register Configuration
Table 9-25 shows the port G register configuration.
Table 9-25 Port G Registers
Name Abbreviation R/W Initial Value*
2
Address*
1
Port G data direction register PGDDR W H'10/H'00*
3
H'FEBF
Port G data register PGDR R/W H'00 H'FF6F
Port G register PORTG R Undefined H'FF5F
Notes: 1. Lower 16 bits of the address.
2. Value of bits 4 to 0.
3. Initial value depends on the mode.