Datasheet

Rev.6.00 Oct.28.2004 page 331 of 1016
REJ09B0138-0600H
Pin Selection Method and Pin Functions
PF
2
/LCAS/WAIT/
BREQO
The pin function is switched as shown below according to the combination of
the operating mode, and bits RMTS2 to RMTS0, LCASS, BREQOE, WAITE,
ABW5 to ABW2, and PF2DDR.
Operating
Mode Modes 4 to 6*
2
Mode 7*
2
LCASS 0*
1
1—
BREQOE — 0 1 —
WAITE — 0 1 — —
PF2DDR — 0 1 — — 0 1
Pin function LCAS
output
pin
PF
2
input
pin
PF
2
output
pin
WAIT
input
pin
BREQO
output
pin
PF
2
input
pin
PF
2
output
pin
Note: 1. Only in DRAM space 16-bit access in modes 4 to 6 when RMTS2 to
RMTS0 = B'001 to B'011.
2. Modes 6 and 7 are provided in the on-chip ROM version only.
PF
1
/BACK The pin function is switched as shown below according to the combination of
the operating mode, and bits BRLE and PF1DDR.
Operating
Mode Modes 4 to 6* Mode 7*
BRLE 0 1 —
PF1DDR 0 1 — 0 1
Pin function PF
1
input pin
PF
1
output pin
BACK
output pin
PF
1
input pin
PF
1
output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
PF
0
/BREQ The pin function is switched as shown below according to the combination of
the operating mode, and bits BRLE and PF0DDR.
Operating
Mode Modes 4 to 6* Mode 7*
BRLE 0 1 —
PF0DDR 0 1 — 0 1
Pin function PF
0
input pin
PF
0
output pin
BREQ
input pin
PF
0
input pin
PF
0
output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.