Datasheet

Rev.6.00 Oct.28.2004 page 328 of 1016
REJ09B0138-0600H
9.13.2 Register Configuration
Table 9-23 shows the port F register configuration.
Table 9-23 Port F Registers
Name Abbreviation R/W Initial Value Address *
1
Port F data direction register PFDDR W H'80/H'00*
2
H'FEBE
Port F data register PFDR R/W H'00 H'FF6E
Port F register PORTF R Undefined H'FF5E
Notes: 1. Lower 16 bits of the address.
2. Initial value depends on the mode.
Port F Data Direction Register (PFDDR)
Bit:76543210
PF7DDR PF6DDR PF5DDR PF4DDR PF3DDR PF2DDR PF1DDR PF0DDR
Mode 7
Initial value : 0 0 0 0 0 0 0 0
R/W:WWWWWWWW
Modes 4 to 6
Initial value : 1 0 0 0 0 0 0 0
R/W:WWWWWWWW
PFDDR is an 8-bit write-only register, the individual bits of which specify input or output for the pins of port F. PFDDR
cannot be read; if it is, an undefined value will be read.
PFDDR is initialized by a power-on reset, and in hardware standby mode, to H'80 in modes 4 to 6, and to H'00 in mode 7.
It retains its prior state after a manual reset*, and in software standby mode. The OPE bit in SBYCR is used to select
whether the bus control output pins retain their output state or become high-impedance when a transition is made to
software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
• Mode 7*
Setting a PFDDR bit to 1 makes the corresponding port F pin PF
6
to PF
0
an output port, or in the case of pin PF
7
, the ø
output pin. Clearing the bit to 0 makes the pin an input port.
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
• Modes 4 to 6*
Pin PF
7
functions as the ø output pin when the corresponding PFDDR bit is set to 1, and as an input port when the bit is
cleared to 0.
The input/output direction specified by PFDDR is ignored for pins PF
6
to PF
3
, which are automatically designated as
bus control outputs (AS, RD, HWR, and LWR).
Pins PF
2
to PF
0
are designated as bus control input/output pins (LCAS, WAIT, BREQO, BACK, and BREQ) by means
of bus controller settings. At other times, setting a PFDDR bit to 1 makes the corresponding port F pin an output port,
while clearing the bit to 0 makes the pin an input port.