Datasheet

Rev.6.00 Oct.28.2004 page 324 of 1016
REJ09B0138-0600H
PEDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port E Register (PORTE)
Bit:76543210
PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
Initial value : —* —* —* —* —* —* —* —*
R/W:RRRRRRRR
Note: * Determined by state of pins PE
7
to PE
0
.
PORTE is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of output data for the port E
pins (PE
7
to PE
0
) must always be performed on PEDR.
If a port E read is performed while PEDDR bits are set to 1, the PEDR values are read. If a port E read is performed while
PEDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTE contents are determined by the pin states, as PEDDR and
PEDR are initialized. PORTE retains its prior state after a manual reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port E MOS Pull-Up Control Register (PEPCR) (On-Chip ROM Version Only)
Bit:76543210
PE7PCR PE6PCR PE5PCR PE4PCR PE3PCR PE2PCR PE1PCR PE0PCR
Initial value : 0 0 0 0 0 0 0 0
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
PEPCR is an 8-bit readable/writable register that controls the MOS input pull-up function incorporated into port E on an
individual bit basis.
When a PEDDR bit is cleared to 0 (input port setting) when 8-bit bus mode is selected in mode 4, 5, or 6, or in mode 7,
setting the corresponding PEPCR bit to 1 turns on the MOS input pull-up for the corresponding pin.
PEPCR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.