Datasheet

Rev.6.00 Oct.28.2004 page 275 of 1016
REJ09B0138-0600H
Pin Selection Method and Pin Functions
P1
3
/PO11/TIOCD0/
TCLKB
The pin function is switched as shown below according to the combination of
the TPU channel 0 setting by bits MD3 to MD0 in TMDR0, bits IOD3 to IOD0 in
TIOR0L, bits CCLR2 to CCLR0 in TCR0, bits TPSC2 to TPSC0 in TCR0 to
TCR2, bit NDER11 in NDERH, and bit P13DDR.
TPU Channel
0 Setting Table Below (1) Table Below (2)
P13DDR — 0 1 1
NDER11 — — 0 1
Pin function TIOCD0 output P1
3
input
P1
3
output
PO11
output
TIOCD0 input *
1
TCLKB input *
2
Notes: 1. TIOCD0 input when MD3 to MD0 = B'0000, IOD3 to IOD0 =B'10××.
2. TCLKB input when the setting for TCR0 to TCR2 is: TPSC2 to
TPSC0 = B'101;
TCLKB input when channels 1 and 5 are set to phase counting
mode.
TPU Channel
0 Setting (2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOD3 to IOD0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
—B'××00 Other than B'××00
CCLR2 to
CCLR0
— — — — Other
than
B'110
B'110
Output
function
— Output
compare
output
— — PWM
mode 2
output
—
×: Don’t care