Datasheet
Rev.6.00 Oct.28.2004 page 256 of 1016
REJ09B0138-0600H
8.3.5 Normal Mode
In normal mode, one operation transfers one byte or one word of data.
From 1 to 65,536 transfers can be specified. Once the specified number of transfers have ended, a CPU interrupt can be
requested.
Table 8-5 lists the register information in normal mode and figure 8-6 shows memory mapping in normal mode.
Table 8-5 Register Information in Normal Mode
Name Abbreviation Function
DTC source address register SAR Designates source address
DTC destination address register DAR Designates destination address
DTC transfer count register A CRA Designates transfer count
DTC transfer count register B CRB Not used
Transfer
SAR DAR
Figure 8-6 Memory Mapping in Normal Mode