Datasheet

Rev.6.00 Oct.28.2004 page 254 of 1016
REJ09B0138-0600H
Interrupt Source
Origin of
Interrupt
Source
Vector
Number
Vector
Address DTCE* Priority
TGI5B (GR5B compare match/
input capture)
TPU
channel 5
61 H'047A DTCED4 High
CMIA0 8-bit timer 64 H'0480 DTCED3
CMIB0
channel 0
65 H'0482 DTCED2
CMIA1 8-bit timer 68 H'0488 DTCED1
CMIB1
channel 1
69 H'048A DTCED0
DMTEND0A (DMAC transfer end 0) DMAC 72 H'0490 DTCEE7
DMTEND0B (DMAC transfer end 1) 73 H'0492 DTCEE6
DMTEND1A (DMAC transfer end 2) 74 H'0494 DTCEE5
DMTEND1B (DMAC transfer end 3) 75 H'0496 DTCEE4
RXI0 (reception data full 0) SCI 81 H'04A2 DTCEE3
TXI0 (transmit data empty 0)
channel 0
82 H'04A4 DTCEE2
RXI1 (reception data full 1) SCI 85 H'04AA DTCEE1
TXI1 (transmit data empty 1)
channel 1
86 H'04AC DTCEE0
RXI2 (reception data full 2) SCI 89 H'04B2 DTCEF7
TXI2 (transmit data empty 2)
channel 2
90 H'04B4 DTCEF6 Low
Note: * DTCE bits with no corresponding interrupt are reserved, and should be written with 0.