Datasheet

Rev.6.00 Oct.28.2004 page 193 of 1016
REJ09B0138-0600H
7.4.3 Module Stop Control Register (MSTPCR)
MSTPCRH MSTPCRL
Bit :1514131211109876543210
Initial value : 0 0 1 1111111111111
R/W : R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
When the MSTP15 bit in MSTPCR is set to 1, the DMAC operation stops at the end of the bus cycle and a transition is
made to module stop mode. For details, see section 21.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in software standby mode.
Bit 15—Module Stop (MSTP15): Specifies the DMAC module stop mode.
Bits 15
MSTP15 Description
0 DMAC module stop mode cleared (Initial value)
1 DMAC module stop mode set