Datasheet

Rev.6.00 Oct.28.2004 page 158 of 1016
REJ09B0138-0600H
6.9 Write Data Buffer Function
The H8S/2357 Group has a write data buffer function in the external data bus. Using the write data buffer function enables
external writes and DMA single address mode transfers to be executed in parallel with internal accesses. The write data
buffer function is made available by setting the WDBE bit in BCRL to 1.
Figure 6-36 shows an example of the timing when the write data buffer function is used. When this function is used, if an
external write or DMA single address mode transfer continues for 2 states or longer, and there is an internal access next,
only an external write is executed in the first state, but from the next state onward an internal access (on-chip memory or
internal I/O register read/write) is executed in parallel with the external write rather than waiting until it ends.
T
1
Internal address bus
Note : n = 0 to 7
A
23
to A
0
External write cycle
HWR, LWR
T
2
T
W
T
W
T
3
On-chip memory read Internal I/O register read
Internal read signal
CSn
D
15
to D
0
External address
Internal memory
External
space
write
Internal I/O register address
Figure 6-36 Example of Timing when Write Data Buffer Function is Used