Datasheet
Rev.6.00 Oct.28.2004 page 137 of 1016
REJ09B0138-0600H
Figure 6-14 shows an example of wait state insertion timing.
By program wait
T
1
Address bus
ΓΈ
AS
RD
Data bus
Read data
Read
HWR, LWR
Write data
Write
Note: indicates the timing of WAIT pin sampling.
WAIT
Data bus
T
2
T
w
T
w
T
w
T
3
By WAIT pin
Figure 6-14 Example of Wait State Insertion Timing
The settings after a power-on reset are: 3-state access, 3 program wait state insertion, and WAIT input disabled. When a
manual reset* is performed, the contents of bus controller registers are retained, and the wait control settings remain the
same as before the reset.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.