Datasheet

Rev.6.00 Oct.28.2004 page 110 of 1016
REJ09B0138-0600H
6.2.3 Wait Control Registers H and L (WCRH, WCRL)
WCRH and WCRL are 8-bit readable/writable registers that select the number of program wait states for each area.
Program waits are not inserted in the case of on-chip memory or internal I/O registers.
WCRH and WCRL are initialized to H'FF by a power-on reset and in hardware standby mode. They are not initialized by
a manual reset* or in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
(1) WCRH
Bit:76543210
W71 W70 W61 W60 W51 W50 W41 W40
Initial value : 1 1 1 1 1 1 1 1
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
Bits 7 and 6—Area 7 Wait Control 1 and 0 (W71, W70): These bits select the number of program wait states when area
7 in external space is accessed while the AST7 bit in ASTCR is set to 1.
Bit 7
W71
Bit 6
W70 Description
0 0 Program wait not inserted when external space area 7 is accessed
1 1 program wait state inserted when external space area 7 is accessed
1 0 2 program wait states inserted when external space area 7 is accessed
1 3 program wait states inserted when external space area 7 is accessed
(Initial value)
Bits 5 and 4—Area 6 Wait Control 1 and 0 (W61, W60): These bits select the number of program wait states when area
6 in external space is accessed while the AST6 bit in ASTCR is set to 1.
Bit 5
W61
Bit 4
W60 Description
0 0 Program wait not inserted when external space area 6 is accessed
1 1 program wait state inserted when external space area 6 is accessed
1 0 2 program wait states inserted when external space area 6 is accessed
1 3 program wait states inserted when external space area 6 is accessed
(Initial value)