Datasheet

Rev.6.00 Oct.28.2004 page 108 of 1016
REJ09B0138-0600H
6.2 Register Descriptions
6.2.1 Bus Width Control Register (ABWCR)
Bit:76543210
ABW7 ABW6 ABW5 ABW4 ABW3 ABW2 ABW1 ABW0
Modes 5 to 7
Initial value : 1 1 1 1 1 1 1 1
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
Mode 4
Initial value : 0 0 0 0 0 0 0 0
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
ABWCR is an 8-bit readable/writable register that designates each area for either 8-bit access or 16-bit access.
ABWCR sets the data bus width for the external memory space. The bus width for on-chip memory and internal I/O
registers is fixed regardless of the settings in ABWCR.
After a power-on reset and in hardware standby mode, ABWCR is initialized to H'FF in modes 5 to 7,*
1
and to H'00 in
mode 4. It is not initialized by a manual reset*
2
or in software standby mode.
Notes: 1. In ROMless version, modes 6 and 7 are not available.
2. Manual reset is only supported in the H8S/2357 ZTAT.
Bits 7 to 0—Area 7 to 0 Bus Width Control (ABW7 to ABW0): These bits select whether the corresponding area is to
be designated for 8-bit access or 16-bit access.
Bit n
ABWn Description
0 Area n is designated for 16-bit access
1 Area n is designated for 8-bit access
(n = 7 to 0)