Datasheet

Rev.6.00 Oct.28.2004 page 96 of 1016
REJ09B0138-0600H
Yes
Program execution status
Interrupt generated?
NMI
Level 6 interrupt?
Mask level 5
or below?
Level 7 interrupt?
Mask level 6
or below?
Save PC, CCR, and EXR
Clear T bit to 0
Update mask level
Read vector address
Branch to interrupt handling routine
Hold pending
Level 1 interrupt?
Mask level 0
Yes
Yes
No
Yes
Yes
Yes
No
Yes
Yes
No
No
No
No
No
No
Figure 5-6 Flowchart of Procedure Up to Interrupt Acceptance in Interrupt Control Mode 2