Datasheet

Rev.6.00 Oct.28.2004 page 90 of 1016
REJ09B0138-0600H
Origin of
Vector
Address*
Interrupt Source
Interrupt
Source
Vector
Number
Advanced
Mode IPR Priority
TGI3A (TGR3A input capture/
compare match)
TGI3B (TGR3B input capture/
compare match)
TGI3C (TGR3C input capture/
compare match)
TGI3D (TGR3D input capture/
compare match)
TCI3V (overflow 3)
TPU
channel 3
48
49
50
51
52
H'00C0
H'00C4
H'00C8
H'00CC
H'00D0
IPRG2 to 0 High
Reserved — 53
54
55
H'00D4
H'00D8
H'00DC
TGI4A (TGR4A input capture/
compare match)
TGI4B (TGR4B input capture/
compare match)
TCI4V (overflow 4)
TCI4U (underflow 4)
TPU
channel 4
56
57
58
59
H'00E0
H'00E4
H'00E8
H'00EC
IPRH6 to 4
TGI5A (TGR5A input capture/
compare match)
TGI5B (TGR5B input capture/
compare match)
TCI5V (overflow 5)
TCI5U (underflow 5)
TPU
channel 5
60
61
62
63
H'00F0
H'00F4
H'00F8
H'00FC
IPRH2 to 0
CMIA0 (compare match A0)
CMIB0 (compare match B0)
OVI0 (overflow 0)
8-bit timer
channel 0
64
65
66
H'0100
H'0104
H'0108
IPRI6 to 4
Reserved — 67 H'010C
CMIA1 (compare match A1)
CMIB1 (compare match B1)
OVI1 (overflow 1)
8-bit timer
channel 1
68
69
70
H'0110
H'0114
H'0118
IPRI2 to 0
Reserved — 71 H'011C
DEND0A (channel 0/channel 0A
transfer end)
DEND0B (channel 0B transfer
end)
DEND1A (channel 1/channel 1A
transfer end)
DEND1B (channel 1B transfer
end)
DMAC 72
73
74
75
H'0120
H'0124
H'0128
H'012C
IPRJ6 to 4
Reserved — 76
77
78
79
H'0130
H'0134
H'0138
H'013C Low