Datasheet
Rev.6.00 Oct.28.2004 page v of xxiv
REJ09B0138-0600H
Item Page Revision (See Manual for Details)
9.12.2 Register Configuration 324 Note added
Port E MOS Pull-Up Control Register (PEPCR) (ON-Chip ROM
Version Only)
Bit:76543210
PE7PCR PE6PCR PE5PCR PE4PCR PE3PCR PE2PCR PE1PCR PE0PCR
Initial value : 0 0 0 0 0 0 0 0
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
10.4.5 Cascaded Operation
Figure10-23 Example of Cascaded
Operation (2)
383 Figure 10-23 amended
(Before) TCLKA → (After) TCLKC
(Before) TCLKB → (After) TCLKD
10.7 Usage Note
Figure 10-57 Contention between
TCNT Write and Overflow
409 Figure 10-57 amended
TCFV flag
Prohibited
11.3.1 Overview
Figure 11-2 PPG Output Operation
423 Figure 11-2 amended
DDR
14.2.8 Bit Rate Register (BRR)
Table 14-4 BRR Setting for Various
Bit Rates (Clocked Synchronous
Mode)
481 Note deleted form table 14-4
19.15.1 Features 619 • Reprogramming capability
Description amended
Depending on the product, the maximum number of times the flash
memory can be reprogrammed is either 100 or 1,000.
Reprogrammable up to 100 times: HD64F2398TE, HD64F2398F
Reprogrammable up to 1,000 times: HD64F2398TET,
HD64F2398FT