Datasheet

Rev.6.00 Oct.28.2004 page 1005 of 1016
REJ09B0138-0600H
R
PGnDDR
C
QD
Reset
WDDRG
Reset
WDRG
R
PGnDR
C
QD
PG
n
RDRG
RPORG
Internal data bus
Bus controller
Chip select
WDDRG:
WDRG:
RDRG:
RPORG:
n = 1 to 3
Write to PGDDR
Write to PGDR
Read PGDR
Read port G
Mode 7
Mode 4/5/6
Legend:
Figure C-13 (b) Port G Block Diagram (Pins PG
1
to PG
3
)