Datasheet

Rev.6.00 Oct.28.2004 page 974 of 1016
REJ09B0138-0600H
R
P2nDDR
C
QD
Reset
WDDR2
Reset
WDR2
R
P2nDR
C
QD
P2
n
RDR2
RPOR2
Internal data bus
PPG module
8-bit timer
TPU module
Pulse output enable
Compare-match
output enable
Pulse output
Compare-match output
Output compare output/
PWM output enable
Output compare output/
PWM output
Input capture input
WDDR2:
WDR2:
RDR2:
RPOR2:
n = 6 or 7
Write to P2DDR
Write to P2DR
Read P2DR
Read port 2
Legend:
Figure C-2 (d) Port 2 Block Diagram (Pins P2
6
and P2
7
)