Datasheet

Section 25 Electrical Characteristics
Rev.6.00 Mar. 18, 2009 Page 894 of 980
REJ09B0050-0600
T
p
T
r
T
c1
T
cw
T
cwp
T
c2
φ
A23 to A0
RAS3, RAS2
UCAS, LCAS
OE, RD
HWR
D15 to D0
UCAS, LCAS
OE, RD
HWR
t
WTS
t
WTH
t
WTS
t
WTH
D15 to D0
WAIT
AS
Read
Write
Tcw : Wait cycle inserted by programmable wait function
Tcwp: Wait cycle inserted by pin wait function
DACK0, DACK1
DACK timing: when DDS = 0
RAS timing: when RAST = 0
Notes:
Figure 25.14 DRAM Access Timing: Two-State Access, One Wait