Datasheet

Section 24 List of Registers
Rev.6.00 Mar. 18, 2009 Page 872 of 980
REJ09B0050-0600
Register
Name Reset
High-
Speed
Clock
Division Sleep
Module
Stop
All Module
Clock Stop
Software
Standby
Hardware
Standby Module
TCR_0 Initialized — — — — — — Initialized TPU_0
TMDR_0 Initialized — — — — — — Initialized
TIORH_0 Initialized — — — — — — Initialized
TIORL_0 Initialized — — — — — — Initialized
TIER_0 Initialized — — — — — — Initialized
TSR_0 Initialized — — — — — — Initialized
TCNT_0 Initialized — — — — — — Initialized
TGRA_0 Initialized — — — — — — Initialized
TGRB_0 Initialized — — — — — — Initialized
TGRC_0 Initialized — — — — — — Initialized
TGRD_0 Initialized — — — — — — Initialized
TCR_1 Initialized — — — — — — Initialized
TMDR_1 Initialized — — — — — — Initialized
TIOR_1 Initialized — — — — — — Initialized
TIER_1 Initialized — — — — — — Initialized
TSR_1 Initialized — — — — — — Initialized
TCNT_1 Initialized — — — — — — Initialized
TGRA_1 Initialized — — — — — — Initialized
TGRB_1 Initialized — — — — — — Initialized
TPU_1
TCR_2 Initialized — — — — — — Initialized
TMDR_2 Initialized — — — — — — Initialized
TIOR_2 Initialized — — — — — — Initialized
TIER_2 Initialized — — — — — — Initialized
TPU_2
TSR_2 Initialized — — — — — — Initialized
TCNT_2 Initialized — — — — — — Initialized
TGRA_2 Initialized — — — — — — Initialized
TGRB_2 Initialized — — — — — — Initialized
Note: * Supported only by the H8S/2368 0.18 μm F-ZTAT Group.