Datasheet

Section 24 List of Registers
Rev.6.00 Mar. 18, 2009 Page 868 of 980
REJ09B0050-0600
Register
Name Reset
High-
Speed
Clock
Division Sleep
Module
Stop
All Module
Clock Stop
Software
Standby
Hardware
Standby Module
DTVECH Initialized — — — — — — Initialized
DTVECR Initialized — — — — — — Initialized
DTC
INTCR Initialized — — — — — — Initialized
IER Initialized — — — — — — Initialized
ISR Initialized — — — — — — Initialized
INT
SBYCR Initialized — — — — — — Initialized
SCKCR Initialized — — — — — — Initialized
SYSCR Initialized — — — — — — Initialized
MDCR Initialized — — — — — — Initialized
MSTPCRH Initialized — — — — — — Initialized
MSTPCRL Initialized — — — — — — Initialized
EXMSTPCRH Initialized — — — — — — Initialized
EXMSTPCRL Initialized — — — — — — Initialized
PLLCR Initialized — — — — — — Initialized
SYSTEM
PCR Initialized — — — — — — Initialized
PMR Initialized — — — — — — Initialized
NDERH Initialized — — — — — — Initialized
NDERL Initialized — — — — — — Initialized
PODRH Initialized — — — — — — Initialized
PODRL Initialized — — — — — — Initialized
NDRH Initialized — — — — — — Initialized
NDRL Initialized — — — — — — Initialized
NDRH Initialized — — — — — — Initialized
NDRL Initialized — — — — — — Initialized
PPG
PORT1 — — — — — — — — PORT
PORT2 — — — — — — — —
PORT3 — — — — — — — —
PORT4 — — — — — — — —
PORT5 — — — — — — — —
PORT8 — — — — — — — —
PORT9 — — — — — — — —