Datasheet

Section 2 CPU
Rev.6.00 Mar. 18, 2009 Page 25 of 980
REJ09B0050-0600
Note: For this LSI, normal mode is not available.
H'0000
H'0001
H'0002
H'0003
H'0004
H'0005
H'0006
H'0007
H'0008
H'0009
H'000A
H'000B
Reset exception vector
(Reserved for system use)
(Reserved for system use)
Exception vector 1
Exception vector 2
Exception
vector table
Figure 2.1 Exception Vector Table (Normal Mode)
PC
(16 bits)
EXR
*
1
Reserved
*
1
*
3
CCR
CCR
*
3
PC
(16 bits)
SP
SP
(SP
*
2
1. When EXR is not used, it is not stored on the stack.
2. SP when EXR is not used.
3. lgnored when returning.
Notes:
(b) Exception Handling(a) Subroutine Branch
)
Figure 2.2 Stack Structure in Normal Mode