Datasheet

Section 20 Flash Memory (0.18-μm F-ZTAT Version)
Rev.6.00 Mar. 18, 2009 Page 745 of 980
REJ09B0050-0600
(b) Flash pass/fail parameter (FPFR: general register R0L of CPU)
This parameter returns value of the erasing processing result.
Bit
Bit
Name
Initial
Value R/W Description
7 ⎯ ⎯ ⎯ Unused
Return 0.
6 MD Programming Mode Related Setting Error Detect
Returns the check result of whether the error protection
state is entered. The error protection state is entered, 1 is
written to this bit. The error protection state can be
confirmed with the FLER bit in FCCS. For conditions to
enter the error protection state, see section 20.5.3, Error
Protection.
0: FLER setting is normal (FLER = 0)
1: FLER = 1 and programming cannot be performed
5 EE ⎯ R/W Erasure Execution Error Detect
1 is returned to this bit when the user MAT could not be
erased or when flash-memory related register settings
are partially changed. If this bit is set to 1, there is a high
possibility that the user MAT is partially erased. In this
case, after removing the error factor, erase the user
MAT. If FMATS is set to H'AA and the user boot MAT is
selected, an error occurs when erasure is performed. In
this case, both the user MAT and user boot MAT are not
erased. Erasing of the user boot MAT should be
performed in boot mode or PROM mode.
0: Erasure has ended normally
1: Erasure has ended abnormally (erasure result is not
guaranteed)
4 FK ⎯ R/W Flash Key Register Error Detect
Returns the check result of FKEY value before start of
the erasing processing.
0: FKEY setting is normal (FKEY = H'5A)
1: FKEY setting is error (FKEY = value other than H'5A)