Datasheet
Section 19 Flash Memory (0.35-μm F-ZTAT Version)
Rev.6.00 Mar. 18, 2009 Page 715 of 980
REJ09B0050-0600
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit)*
3
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)
Notes: 1. When entering boot mode or making a transition from boot mode to another mode, mode switching must be
carried out by means of
RES input. The state of ports with multiplexed address functions and bus control output
pins (AS, RD, HWR, LWR) will change during this switchover interval (the interval during which the RES pin
input is low), and therefore these pins should not be used as output signals during this time.
2. When making a transition from boot mode to another mode, a mode programming setup time t
MDS
(min) of 200
ns is necessary with respect to RES clearance timing.
3. See section 25.2.5, Flash Memory Characteristics.
4. Wait time: 100 μs
φ
V
CC
t
OSC1
t
MDS
t
MDS
Wait time: x
Programming/erasing
possible
Wait time: x
Programming/erasing
possible
Wait time: x
Programming/erasing
possible
Wait time: x
Programming/erasing
possible
t
RESW
MD2 to MD0
RES
SWE bit
Boot
mode
Mode
change
*
1
Mode
change
*
1
User
program
mode
User
program
mode
User
program
mode
User modeUser
mode
User
mode
SWE
set
SWE
cleared
*
4
*
4
*
4
*
4
*
2
Figure 19.10 Mode Transition Timing
(Example: Boot Mode → User Mode ↔ User Program Mode)