Datasheet

Section 19 Flash Memory (0.35-μm F-ZTAT Version)
Rev.6.00 Mar. 18, 2009 Page 714 of 980
REJ09B0050-0600
φ
V
CC
t
OSC1
Min 0 μs
t
MDS
*3
MD2 to MD0
*1
RES
SWE bit
SWE set
(1) Boot Mode
(2) User Program Mode
SWE cleared
Programming/
erasing
possible
Wait time: x Wait time: 100 μs
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit)
*2
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations
prohibited)
Notes: 1. Except when switching modes, the level of the mode pins (MD2 to MD0) must be fixed until
power-off by pulling the pins up or down.
2. See section 25.2.5, Flash Memory Characteristics.
3. Mode programming setup time t
MDS
(min) = 200 ns
SWE set
SWE cleared
φ
V
CC
t
OSC1
MD2 to MD0
*1
RES
SWE bit
Programming/
erasing
possible
Wait time: x
t
MDS
*3
Wait time: 100 μs
Min 0 μs
Figure 19.9 Power-On/Off Timing