Datasheet

Section 19 Flash Memory (0.35-μm F-ZTAT Version)
Rev.6.00 Mar. 18, 2009 Page 711 of 980
REJ09B0050-0600
The FLMCR1, FLMCR2, EBR1, and EBR2 settings are retained, but program mode or erase
mode is forcibly aborted at the point at which the error occurred. Program mode or erase mode
cannot be re-entered by re-setting the P or E bit. However, since PV and EV bit setting is enabled,
and a transition can be made to verify mode. The error protection state can be canceled by a reset
or in hardware standby mode.
19.9 Programmer Mode
In programmer mode, a PROM programmer can perform programming/erasing via a socket
adapter, just like for a discrete flash memory. Use a PROM programmer which supports the
Renesas 512-kbyte flash memory on-chip MCU device type (FZTAT512V3A). A 12-MHz input
clock is needed.
19.10 Power-Down States for Flash Memory
In user mode, the flash memory will operate in either of the following states:
• Normal operating mode
The flash memory can be read.
• Standby mode
All flash memory circuits are halted.
Table 19.7 shows the correspondence between the operating modes of this LSI and the flash
memory. When the flash memory returns to normal operation from a standby state, a power
supply circuit stabilization period is needed. When the flash memory returns to its normal
operating state, bits STS3 to STS0 in SBYCR must be set to provide a wait time of at least 100 µs,
even when the external clock is being used.
Table 19.7 Flash Memory Operating States
Operating Mode Flash Memory Operating State
Active mode Normal operating state
Sleep mode Normal operating state
Standby mode Standby state