Datasheet

Section 19 Flash Memory (0.35-μm F-ZTAT Version)
Rev.6.00 Mar. 18, 2009 Page 700 of 980
REJ09B0050-0600
19.5.3 Erase Block Register 1 (EBR1)
EBR1 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Set only one bit in EBR1 and EBR2 together (do not set more than one bit at the
same time. Setting more than one bit will automatically clear all EBR1 and EBR2 bits to 0). For
details, see table 19.3.
Bit Bit Name Initial Value R/W Description
7 EB7 0 R/W When this bit is set to 1, 4 kbytes of EB7 are to be
erased.
6 EB6 0 R/W When this bit is set to 1, 4 kbytes of EB6 are to be
erased.
5 EB5 0 R/W When this bit is set to 1, 4 kbytes of EB5 are to be
erased.
4 EB4 0 R/W When this bit is set to 1, 4 kbytes of EB4 are to be
erased.
3 EB3 0 R/W When this bit is set to 1, 4 kbytes of EB3 are to be
erased.
2 EB2 0 R/W When this bit is set to 1, 4 kbytes of EB2 are to be
erased.
1 EB1 0 R/W When this bit is set to 1, 4 kbytes of EB1 are to be
erased.
0 EB0 0 R/W When this bit is set to 1, 4 kbytes of EB0 are to be
erased.
19.5.4 Erase Block Register 2 (EBR2)
EBR2 specifies the flash memory erase area block. EBR2 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Set only one bit in EBR2 and EBR1 together (do not set more than one bit at the
same time. Setting more than one bit will automatically clear all EBR1 and EBR2 bits to 0). For
details, see table 19.3.