Datasheet

Section 16 A/D Converter
Rev.6.00 Mar. 18, 2009 Page 673 of 980
REJ09B0050-0600
16.4.4 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to 11 in
ADCR, external trigger input is enabled at the ADTRG pin. A falling edge at the ADTRG pin sets
the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as when the bit ADST has been set to 1 by software. Figure 16.3 shows the
timing.
φ
ADTRG
Internal trigger signal
ADST
A/D conversion
Figure 16.3 External Trigger Input Timing
16.5 Interrupts
The A/D converter generates an A/D conversion end interrupt (ADI) at the end of A/D conversion.
Setting the ADIE bit to 1 enables an ADI interrupt requests while the bit ADF in ADCSR is set to
1 after A/D conversion is completed. The DTC or DMAC can be activated by an ADI interrupt.
Having the converted data read by the DTC or DMAC in response to an ADI interrupt enables
continuous conversion to be achieved without imposing a load on software.
Table 16.5 A/D Converter Interrupt Source
Name Interrupt Source Interrupt Flag DTC Activation DMAC Activation
ADI End of conversion ADF Possible Possible